1. Field of the Invention
The present invention relates to a data storage system and method of operating the same, and more particularly, to a data storage system with a complex memory comprising a flash memory and a method of operating the data storage system.
2. Description of the Related Art
Data storage systems using a flash memory device have been widely used in an embedded system and a mobile system. The data storage system using a flash memory device is one of electrically erasable programmable read-only memories (EEPROMs) on and from which the data can be written, read, and erased. While reading speed of the data storage system using a flash memory device is fast, writing and erasing speeds thereof are slow.
In the data storage system using a flash memory device, the data input/output unit is a page of 2-Bytes or 4-Bytes for a NOR-type flash memory device and 512-Bytes or 2-Kbytes for a NAND-type flash memory device. In addition, the erasing operation unit is a block of 128-Kbytes for the NOR-type flash memory device and 16-Kbytes or 64-Kbytes for the NAN D-type flash memory device.
That is, for the NOR-type flash memory device, it takes about 400 μs to write 2-Bytes. For the NAND-type flash memory device, it takes about 220 μs to write 512-Bytes and takes about 2 ms-2 s to erase 512-Bytes. That is, for the NAND-type memory device, the erasing operation is relatively slow.
In contrast, for a random access memory (RAM) device, it takes several tens of nano seconds to store a word. That is, the writing speed of data storage systems using the flash memory device is far slower than that of the RAM device.
Accordingly, a flash memory device is generally used as a code memory device that does not frequently undergo writing operations or an auxiliary memory device of which writing performance is not important. In addition, a data storage system using a flash memory device cannot perform real-time data storing operation. Thus, there are limitations in using the data storage systems using a flash memory device in a digital product such as a digital camera or a digital camcorder.
Therefore, a technology for logically and effectively hiding the erasing operation using a flash translation layer (FTL) employed using hardware or software has been developed (refer to U.S. Pat. No. 6,311,290 to J. Kim, et al. and “A space-Efficient Flash Translation Layer for Compact Flash systems” IEEE Trans. Consumer Elec., Vol. 48, No. 2 pp, 366-375, 2002).
However, even when the erasing operation is hidden using the FTL, the writing speed of flash memory devices are still slow compared to RAM devices. Thus, in the case of storing mass data, the writing speed of a data storage system using a flash memory is less than that of a RAM device. Due to this, a flash memory device is generally used as a code memory device that does not frequently undergo writing operations or as an auxiliary memory device of which writing performance is not important. Particularly, flash memory devices are very limited in being used in a device such as the digital camera, camcorder and mobile phone that process and store data in real-time.
An input/output buffer (or cash) is used to improve the input/output performance of the flash memory device. Korean Patent Application No. 2003-32552 discloses a data storage system that uses an SRAM or DRAM as the input/output buffer (or cash). US Patent Application No. 2004/0193782 A1 discloses a data storage system that improves writing performance by using a magnetic RAM as a writing buffer.
In the data storage system disclosed in Korean Patent Application No. 2003-32552, input performance can be improved by maintaining data that is frequently accessed in the cash, which has a fast input/output speed, using a temporal-spatial locality appearing in an input/output pattern of the flash memory device. However, when the writing operation is done only in the cash, the data may be erased if power is turned off before the data is stored in the flash memory device. That is, the data maintenance that is a basic condition of the data storage system cannot be ensured. Therefore, although the reading performance is improved, the an ideal writing performance is not yet satisfied.
In the data storage system disclosed in US Patent Application No. 2004/0193782 A1, when a writing operation larger than the capacity of a MRAM used in the system is continuously requested, an overflow is generated in the MRAM and thus the following writing request is directly done in the flash memory device. This leads to a deterioration of the writing performance.